Note: The job is a remote job and is open to candidates in USA. SWISSto12 is one of the world’s fastest-growing aerospace companies, specializing in high-performance Radio Frequency (RF) products and applications. They are seeking a highly motivated mid-level FPGA Engineer to support the development of advanced software-defined radio (SDR) and next-generation wireless platforms, focusing on implementing high-performance, real-time signal processing pipelines on FPGA and SoC platforms.
Responsibilities
- Design, implement, and verify FPGA-based DSP algorithms for communications systems (e.g., channelization, modulation/demodulation, filtering, beamforming)
- Develop high-performance RTL (VHDL/Verilog/SystemVerilog) for real-time signal processing pipelines
- Implement and optimize data paths involving high-speed ADCs/DACs (e.g., JESD204B/C interfaces)
- Integrate FPGA designs within heterogeneous SoC platforms (e.g., Xilinx/AMD Versal, Zynq, RFSoC)
- Support development of software-defined radio (SDR) platforms and digital front-end architectures
- Collaborate on system partitioning between FPGA fabric, embedded processors, and external compute platforms
- Perform timing closure, resource optimization, and performance tuning for high-throughput designs
- Develop simulation and verification environments (MATLAB, Python, HDL testbenches)
- Interface with RF, systems, and software engineers to ensure end-to-end system performance
- Document architectures, design decisions, and test results for internal and external stakeholders
Skills
- Bachelor's or Master's degree in Electrical Engineering or related field
- 5–7 years of experience in FPGA/ASIC design and development and embedded platforms
- Strong understanding of digital signal processing (DSP) principles
- Proficiency in RTL design (VHDL, Verilog, or SystemVerilog)
- Experience with FPGA toolchains (e.g., Xilinx Vivado/Vitis, Intel Quartus)
- Experience implementing high-speed digital interfaces (e.g., JESD204, LVDS, SERDES)
- Familiarity with MATLAB/Simulink or Python for algorithm development and modeling
- Understanding of fixed-point arithmetic and hardware-efficient DSP implementation
- Experience with wireless communication systems (LTE, 5G NR)
- Knowledge of PHY-layer signal processing (OFDM, MIMO, channel estimation, synchronization)
- Experience with RFSoC or similar integrated RF + FPGA platforms
- Familiarity with beamforming architectures (digital or hybrid)
- Experience with embedded SoC environments (ARM cores, Linux, bare-metal)
- Exposure to high-speed networking protocols (e.g., Ethernet, eCPRI)
- Experience with hardware/software co-design and system partitioning
- Familiarity with version control (Git) and CI/CD workflows for FPGA development
- Familiarity with FPGA development for space applications
Benefits
- Location: United States (New York / New Jersey area) - Fully remote role.
Company Overview